Analog Layout Eng- 7nm

Chipright is currently seeking an experienced analog/mixed-signal layout design engineer to support our customer's project in the development of SerDes solutions.

 RESPONSIBILITIES:

Execute layout design for high‑speed, high‑performance SerDes analog and mixed‑signal circuits according to project specifications.

Perform block‑level physical implementation, including floorplanning, power distribution networks, clock and signal routing, and transistor‑level analog/mixed‑signal layout.

Contribute to post‑layout circuit performance analysis.

Support block/IP/chip‑level integration activities.

Develop realistic schedules and provide clear progress tracking and status updates.

Identify and resolve layout quality issues and offer feedback to design team

EXPERIENCE:

Strong understanding of analog and mixed‑signal layout fundamentals, including IR/EM effects, coupling and self‑capacitance, RC delay, and self‑heatin...