Analog Layout Engineer

Chipright • france, france, France • Posted June 09, 2026

Location france, france

Job Type Part Time

Category Engineers

Posted June 09, 2026

Analog Layout EngineerJob description: Experience in manual full-custom Analog layout of IC in CMOS/Bi-CMOS process.
Experience with high frequency layout
design verification and debugging such as DRC, ERC, ESDDRC, LVS, ANTENNA DRC, using verification tool such as PVS.
Floor planning from sub-block to chip top level
Very organized and result oriented
Very good understanding of matching techniques

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