ASIC Engineer, Design Verification

Meta • Sunnyvale, CA, United States • Posted July 25, 2026

Location Sunnyvale, CA
Job Type Full-time
Category other-general
Posted July 25, 2026
**Summary:**
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to drive verification strategy and execution for custom silicon powering Meta's data center infrastructure. In this role, you will lead the end-to-end verification of complex IP blocks and SoCs designed for AI/ML acceleration, networking, and video processing workloads. You will architect scalable UVM-based verification environments, define coverage models, and partner with design, emulation, and post-silicon validation teams to achieve first-pass silicon success across Meta's infrastructure ASIC portfolio.
**Required Skills:**
ASIC Engineer, Design Verification Responsibilities:
1. Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification
2. Develop functional tests based on verification test plan
3. Drive Design Verification to closure based on defined verification metrics on test plan, function...

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