Design Analysis Engineer

ACL Digital • Hyderabad, Telangana, India • Posted May 27, 2026

Location Hyderabad, Telangana
Job Type Full-time
Category Engineers
Posted May 27, 2026
Position: RTL Design Engineer Experience: 5 - 8 Years Qualifications: BE/Btech in ECE/EEE Responsibilities - The candidate should have strong RTL design experience. Strong design experience in Ethernet IPs or Ethernet protocol domain. Knowledge in Verilog/VHDL languages Scripting languages: TCL/Perl/Python (any one). Knowledge of AXI Protocols.

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