Design Enablement Engineer II
Location
Shanghai, China
Job Type
Full-time
Category
other-general
Posted
June 08, 2026
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Key responsibilities
+ Leverage silicon verification platform and environment to create necessary post-silicon infrastructure, methodology and automation to allow tests executed in a timely and efficient manner.
+ Integrate silicon, HW, firmware, and system software into a complete system which includes various InfiniBand and PCIe protocols, PXE booting, virtual machines, secure networks, Ethernet and Ethernet-over-InfiniBand, sockets and RPC calls, FPGA, microcontroller interfaces, JTAG, I2C, SPI, SERDES, memory and many other interfaces.
+ Execute post-silicon tests to expose design issues, validate product against the specifications including performance, and qualify the design for production release.
+ Review, replicate, and respond to customer issues. Perform initial analysis of error logs from customer design simulation runs. Debug ...
Key responsibilities
+ Leverage silicon verification platform and environment to create necessary post-silicon infrastructure, methodology and automation to allow tests executed in a timely and efficient manner.
+ Integrate silicon, HW, firmware, and system software into a complete system which includes various InfiniBand and PCIe protocols, PXE booting, virtual machines, secure networks, Ethernet and Ethernet-over-InfiniBand, sockets and RPC calls, FPGA, microcontroller interfaces, JTAG, I2C, SPI, SERDES, memory and many other interfaces.
+ Execute post-silicon tests to expose design issues, validate product against the specifications including performance, and qualify the design for production release.
+ Review, replicate, and respond to customer issues. Perform initial analysis of error logs from customer design simulation runs. Debug ...