Design For Test Engineer

Job responsibilities include DFT pattern generation, coverage analysis and debug as well as running and debugging gate level simulations.All employees are expected to actively support diversity on their teams, and in the Company.Preferred Qualifications- Masters' or Bachelor's degree in Electrical or Computer Engineering.
- Understanding of digital logic design and verification.
- Familiarity with System Verilog, UVM, use of assertions during verification.
- Proficiency in Perl, Python, or other scripting languages.
- Exposure to EDA tools is considered advantageous.
- Detail oriented with strong organizational, problem solving, and communication skills.Good team player.