Design Verification Engineer

Job Summary:

We are seeking a highly skilled Design Verification Engineer (DV) with 7-10 years of experience to join our growing team and play a vital role in ensuring the quality and functionality of our advanced ASICs and SoCs. This position requires a strong foundation in verification methodologies and the ability to handle complex verification tasks. You will be instrumental in developing robust verification plans and environments to guarantee the success of our next-generation integrated circuits.

Responsibilities:

• Develop and implement comprehensive verification plans utilizing industry-leading methodologies (UVM, Formal Verification)
• Design and create high-quality verification environments (testbenches) to achieve exceptional code coverage
• Utilize advanced verification tools (simulators, formal verification tools) to thoroughly verify RTL functionality
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