Digital Design Verification Engineer | Precision ADC
Location
Tucson, AZ
Job Type
Full-time
Category
other-general
Posted
June 04, 2026
**Change the world. Love your job.**
Texas Instruments' Precision ADC team is seeking a Design Verification Engineer to help verify cutting-edge signal chain solutions utilizing delta-sigma ADCs. You will work alongside world-class analog and mixed-signal designers developing some of the highest-precision data converters in the industry. This is a hands-on role with real ownership, where your verification work directly contributes to products trusted in medical, industrial, automotive and instrumentation applications worldwide.
In this position, you will develop SystemVerilog/UVM testbenches to verify the digital logic, calibration algorithms, and mixed-signal interfaces of Signal chains involving high-resolution delta-sigma ADCs. Your responsibilities will include building constrained-random stimulus environments, writing functional coverage models and assertions, running regression campaigns, and triaging simulation failures in close collaboration with the RTL and a...
Texas Instruments' Precision ADC team is seeking a Design Verification Engineer to help verify cutting-edge signal chain solutions utilizing delta-sigma ADCs. You will work alongside world-class analog and mixed-signal designers developing some of the highest-precision data converters in the industry. This is a hands-on role with real ownership, where your verification work directly contributes to products trusted in medical, industrial, automotive and instrumentation applications worldwide.
In this position, you will develop SystemVerilog/UVM testbenches to verify the digital logic, calibration algorithms, and mixed-signal interfaces of Signal chains involving high-resolution delta-sigma ADCs. Your responsibilities will include building constrained-random stimulus environments, writing functional coverage models and assertions, running regression campaigns, and triaging simulation failures in close collaboration with the RTL and a...