GPU Physical Design Engineer Lead

Intel • Folsom, CA, United States • Posted May 28, 2026

Location Folsom, CA
Job Type Full-time
Category other-general
Posted May 28, 2026
**Job Details:**

**Job Description:**

**The primary responsibilities for this role will include, but are not limited to:**

+ In this position, the candidate will be part of a team implementing ASIC designs for Integrated/Discrete Graphics and AI SoCs on leading edge process technology and EDA tools.
+ The team is responsible for all SoC level physical design and optimization flows ranging from Floor-planning, Clocking, Synthesis through GDS and parallel verification aspects such as Static Timing Analysis, Formal Verification, EM/IR/PDN verification, Quality Assurance, Layout Verification etc.
+ Responsibilities may also include defining design requirements such as frequency, operating voltages, power, etc. to achieve optimized designs on new technologies, processes and architectures.
+ The candidate would be required to work closely with the rest of the project team members to resolve issues which arise during the design cycle and take the key learn...

Interested in this role?

Click the button below to start your application.

Apply Now