Lead Design Engineer

Cadence Design Systems, Inc. • Pune, Maharashtra, India • Posted June 05, 2026

Location Pune, Maharashtra
Job Type Full time
Category Engineers
Posted June 05, 2026

Description

(what the role does)
  • Technical interface for customer
  • Support customer Pre-post silicon SOC teams from initial PCIe Controller integration and bring-up.
  • Work closely with PCIe R&D team and Field Application Engineers
  • Update PCIe team with the latest customer feedback and competitive analysis.
  • Work closely with Physical design team and RTL team to understand chip architecture, hierarchy.
  • Perform RTL simulation to verify functionality.
  • We’re doing work that matters. Help us solve what others can’t.

    Interested in this role?

    Click the button below to start your application.

    Apply Now