Lead Software Engineer - Logic Synthesis
Location
Shanghai, China
Job Type
Full-time
Category
other-general
Posted
July 27, 2026
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Position Description:
+ Responsible for development and maintenance of the synthesizer for Palladium.
+ Implementation for new VHDL/Verilog feature support in synthesizer.
+ Logic optimization and performance improvement in synthesizer.
Position Requirement:
+ This position requires a Bachelor or Master's degree in EE/CS/CE with 3-5 years of industry experience.
+ Candidate should be proficient with C/C++, Operating system concepts.
+ Design modeling using Verilog/SV, VHDL or SysC.
+ Knowledge and experience in RTL modeling of BFMs along with exposure to verification methodologies using UVM and SC/TLM is preferable.
+ EDA/CAD tool development experience or logic design verification experience is highly preferred.
+ Knowledge and experience in AI tools like Copilot...
Position Description:
+ Responsible for development and maintenance of the synthesizer for Palladium.
+ Implementation for new VHDL/Verilog feature support in synthesizer.
+ Logic optimization and performance improvement in synthesizer.
Position Requirement:
+ This position requires a Bachelor or Master's degree in EE/CS/CE with 3-5 years of industry experience.
+ Candidate should be proficient with C/C++, Operating system concepts.
+ Design modeling using Verilog/SV, VHDL or SysC.
+ Knowledge and experience in RTL modeling of BFMs along with exposure to verification methodologies using UVM and SC/TLM is preferable.
+ EDA/CAD tool development experience or logic design verification experience is highly preferred.
+ Knowledge and experience in AI tools like Copilot...