Memory Bitcell Design Engineer

Tata Consultancy Services • Bengaluru, Karnataka, India • Posted June 05, 2026

Location Bengaluru, Karnataka
Job Type Full-time
Category Engineers
Posted June 05, 2026

Job Title: Senior Analog Design Engineer specialized in Memory Cell Design


Job Summary

Analog Design Engineer with strong expertise in advanced-node analog and mixed-signal circuit design, specifically in memory bit-cell/periphery design at Angstrom-class technology nodes and PLL / clock-generation architectures.

The role involves transistor-level design, simulation, and optimization of high-performance analog circuits for next-generation SoCs, memory interfaces, and compute platforms.

The ideal candidate will have deep experience in custom analog design, device-level circuit optimization, PPA tradeoffs, and design closure in deeply scaled technologies, with exposure to FinFET / GAA -era design challenges.


Key Responsibilities :

1. Memory Cell Design (Angstrom Nodes)

Design and optimize memory bit-cells (e.G., SRAM / register-file / custom embedded memory cells) in sub-2nm / Angstrom-class process nodes.

Devel...

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