Memory Circuit Design Engineer

Intel • Santa Clara, CA, United States • Posted June 03, 2026

Location Santa Clara, CA
Job Type Full-time
Category other-general
Posted June 03, 2026
**Job Details:**

**Job Description:**

You will be partnering with and leveraging domain experts across various areas of technology development, EDA vendors and product design teams to develop and deliver high-quality industry-leading memory technology collaterals and to drive circuit innovations that enable next generation high-performance, high-density, low-power embedded memory designs on Intel advanced CMOS process technologies.

In this position your responsibilities will include, but may not be limited to:

+ Memory pathfinding activities and power, performance and area (PPA) optimization through design technology co-optimization (DTCO) and product design enablement.
+ Memory bit-cell and complex periphery IC layout and automation.
+ Memory array/IP design, memory circuit innovation, test-chip design.
+ Pre-Si verification, post-Si validation and debugging to enable yield and parametric tracking/ramp.

The Advanced Design (AD) tea...

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