Opening for SoC Verification with PCie Gen 5/6 engineer - Bangalore

UST • karnataka, india, India • Posted June 09, 2026

Location karnataka, india
Job Type Full-time
Category end-to-end,hardware,lead,performance,sed
Posted June 09, 2026

Hi,


Opening for SoC Verification Engineer with Pcie Gen5/6 experience.

Key Responsibilities


10+years of experience:-

  • Execute top-level SoC verification for complex designs integrating PCIe and DDR subsystems
  • Define and execute verification strategies, plans, and methodologies for full-chip validation
  • Develop and maintain UVM/SystemVerilog-based verification environments
  • Drive end-to-end verification including integration, performance, and corner-case scenarios
  • Ensure robust coverage through functional, code, and assertion-based verification
  • Debug and root-cause complex issues across hardware and verification environments
  • Lead PCIe (Gen 5) and DDR4/DDR5 protocol verification and compliance
  • Mentor and guide junior enginee...

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