Physical Design Lead, ASIC

Google • Sunnyvale, CA, United States • Posted July 21, 2026

Location Sunnyvale, CA
Job Type Full-time
Category other-general
Posted July 21, 2026
Physical Design Lead, ASIC

_corporate_fare_ Google _place_ Sunnyvale, CA, USA

**Advanced**

Experience owning outcomes and decision making, solving ambiguous problems and influencing stakeholders; deep expertise in domain.

**Minimum qualifications:**

+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
+ 10 years of experience in physical design, including custom structured datapath implementation.
+ Experience hardening dense compute units (such as dot-product engines, multiplier-accumulator (MACs), multipliers, or arithmetic logic unit (ALUs) into high-frequency, low-power macros.
+ Experience in sub-7nm process nodes (including FinFET and Gate-All-Around architectures), managing the physical density and routing congestion typical of custom datapaths.

**Preferred qualifications:**

+ Master's degree or PhD in Electrical Engine...

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