Senior Analog IP Integration, Power, and SI Engineer
Location
Phoenix, AZ
Job Type
Full-time
Category
other-general
Posted
June 13, 2026
**Job Details:**
**Job Description:**
The Hard IP and Test Chip Development team, within Intel's Central Engineering Group, is responsible for delivering industry defining analog and mixed signal IP for Intel's Client, Datacenter, AI and Foundry customers. The IO team owns high-speed serial IO and die-to-die interfaces across multiple advanced process nodes. We are seeking an experienced Analog Design Engineers to join our engineering team. The successful candidate will be responsible for designing, developing, and optimizing IP floor plans, bump maps, power delivery schemes for IP implementations in various applications. This role requires technical expertise in analog circuit design and the ability to lead complex projects from concept to production.
**Key Responsibilities**
Design And Development
+ Design and simulate analog and mixed-signal circuits including amplifiers, data converters, voltage regulators, PLLs, and other analog buildin...
**Job Description:**
The Hard IP and Test Chip Development team, within Intel's Central Engineering Group, is responsible for delivering industry defining analog and mixed signal IP for Intel's Client, Datacenter, AI and Foundry customers. The IO team owns high-speed serial IO and die-to-die interfaces across multiple advanced process nodes. We are seeking an experienced Analog Design Engineers to join our engineering team. The successful candidate will be responsible for designing, developing, and optimizing IP floor plans, bump maps, power delivery schemes for IP implementations in various applications. This role requires technical expertise in analog circuit design and the ability to lead complex projects from concept to production.
**Key Responsibilities**
Design And Development
+ Design and simulate analog and mixed-signal circuits including amplifiers, data converters, voltage regulators, PLLs, and other analog buildin...