Senior Design for Test (DFT) Engineer

DFT specifications, architecture and implementation using state-of-the-art methodologies and tools

Methodology support, DFT Flow Automation, and DFT Innovation

Support all product lines with High Coverage, Low Power, Low Test Time

Deliver high quality, verified, Automatic Test Pattern Generation (ATPG) patterns

Pre/Post silicon verification & debug

Work independently and mentor junior team members

6 - 8 years of directly related experience in ASIC/SoC DFT

Expert level knowledge of DFT architecture and planning

Hands on Tessent DFT Tool experience

Expert level knowledge of Scan, Test Compression, At-Speed Test, Memory Built-In Self-Test (MBIST), Logic Bist (LBIST)

Hands-on experie...