Senior Design Verification Engineer

Cadence • India, India, India • Posted May 23, 2026

Location India, India
Job Type Full-time
Category Engineers
Posted May 23, 2026

Job Title: Principal Software Engineer – VIP (Verification IP)

Location: Noida

Experience: 7-10 yrs

Job Summary

We are looking for a Principal Engineer for our Verification IP (VIP) team to design and develop high-quality VIP solutions for next-generation high-speed protocols. The role involves working on architecture, development, and validation of protocol-compliant VIPs.

Key Responsibilities

  • Architect, design, and develop Verification IP (VIP) for industry-standard protocols.
  • Lead development of VIP using SystemVerilog/UVM methodologies
  • Define verification strategies, test plans, and coverage models
  • Drive protocol compliance, debugging, and performance optimization
  • Mentor junior engineers and provid...

Interested in this role?

Click the button below to start your application.

Apply Now