Senior DFT & Post Silicon Validation Engineer
Location
, , spain, , , spain
Job Type
Full-time
Category
Ingeniería y tecnología
Posted
June 08, 2026
Senior DFT & Post Silicon Validation Engineer
Place: Barcelona, Spain
Permanent
Description
We are hiring! Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in package? We need you! As a Senior DFT and Post-Silicon Engineer, you will collaborate in the DFT implementation process, ensuring seamless integration with test and post-silicon validation teams. You will work with cutting‑edge technology, collaborating closely with external IP providers, EDA vendors, and internal teams to deliver high‑quality, high‑performance SoCs or SiPs for mass production.
Key Responsibilities
- Define and implement DFT architectures to improve testability, debug capabilities, and manufacturability.
- Ensure proper insertion of DFT features such as scan chains, BIST (Built-In Self-Test), and JTAG interfaces.
- Optimize DFT methodologies to minimize test time, redu...