Senior UVM Verification Engineer

ic resources • Grenoble, Auverge-Rhône-Alpes, France • Posted June 05, 2026

Location Grenoble, Auverge-Rhône-Alpes
Job Type Permanent
Category Computer Occupations
Posted June 05, 2026
Are you looking for the next step in your career in UVM Verification? Would you like to learn from skilled experts in a friendly and growing environment with exciting projects? If the answer is yes, then this may be the perfect opportunity for you!

I have a key requirement for an experienced/senior Verification Engineer - to work for an established company based in the Grenoble area - who focus on design and verification services for a number of major clients.

As the senior verification engineer, you will be responsible for R&D projects and the development of verification environments (SystemVerilog / UVM /…), VIP components and giving training to other engineers.

Technical skills
  • 3-5+ years' IP or SoC verification experience
  • Confident knowledge with SystemVerilog and UVM methodology
  • SoC architecture
  • Bus communication protocols knowledge - AMBA / AXI etc.
  • OOP (Object Oriented Programming) an...
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