SoC Debug / Post-Silicon PnP Validation Engineer

Intel • San Jose, CA, United States • Posted June 22, 2026

Location San Jose, CA
Job Type Full-time
Category other-general
Posted June 22, 2026
**Job Details:**

**Job Description:**

**About the Role**

Intel is seeking a motivated and detail-oriented **SoC Debug / Post-Silicon** **PnP** **Validation Engineer** to join our Silicon Architecture diverse team, where innovation meets execution. In this role, you will work on cutting-edge technologies, performing comprehensive power and performance validation, low-level debug tasks, and complex analysis at the SoC level for Intel products.

Your expertise and contributions will help identify and resolve critical issues, improve validation methodologies, and ensure the reliability and performance of our industry-leading products. This role has a direct impact on Intel's success by driving advancements in design for debug (DFD) tools, power validation scripts, and methodologies, ultimately delivering world-class solutions that power the future of computing.

**What You’ll Do**

**Key responsibilities will include but not limited ...

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