SoC Verification Engineer | UVM & System Verilog Specialist

Texas Instruments • bengaluru, karnataka, India • Posted May 30, 2026

Location bengaluru, karnataka
Job Type Full-time
Category architecture,customer,debugging,design,firmware,ios,project,sed
Posted May 30, 2026

Responsibilities:


Complete ownership of IP/subsystem/SOC DV ownership right from spec definition till the post silicon verification and solving the customer issues on need basis. This includes:


  • Active involvement with architecture team during the spec definition phase
  • Verification strategy definition along with Verification plan to meet 100% spec to regression traceability along with signoff metrics
  • SubSystem/SOC verification covering functional and Firmware scenarios in RTL/PARTL, GLS/PAGLS modes.
  • DV Environment ownership: TB development/enhancements including checkers and coverage monitor definitions along with DV flow updates as per the project needs
  • Active collaboration with cross functional teams -Architecture, RTL, PD, DFT, Systems, Analog, FW and application teams -to enable the Verification goals for IP/Subsystem/SOC starting from spec definition till post silicon verificatio...

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