Sr/ IC Design Engineer (Design Verification)
Location
singapore, singapore
Job Type
Full-time
Category
Other-General
Posted
June 05, 2026
Job Descriptions
- Develop and Review Test Plan based on IC design specification
- Develop constrained-Random verification environment for complex DUT
- Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance
- Implement coverage matrix using cover point and assertion
- Create and debug tests for DUT
- Resolve bugs with remote designers
- Bachelor/Masters Degree in Electrical/Electronics/Computer Engineering with min 1 year of experience
- Hands‑on experience in Silicon/ IP verification using SystemVerilog/ UVM
- Strong understanding of verification process from test plan to coverage completion
- Strong communication and Analytical skills
- Understanding of HDL (Verilog, VHDL)
- Experience in using leading EDA software tools like Cadence/ Synopsys