Technical Manager – DFT (Design for Test)
Location
Mumbai, Maharashtra
Job Type
Full-time
Category
Computer Occupations
Posted
June 14, 2026
Technical Manager – DFT (Design for Test)
Location: Bengaluru
Experience: 12–16 Years
About the Role
We are looking for a highly technical DFT Manager to lead the architecture, implementation, and signoff of Design-for-Test solutions for next-generation SoCs targeting AI/ML, Data Center, Networking, Automotive, and High-Performance Computing applications.
This role requires a hands-on leader who can drive DFT strategy, manage a high-performing engineering team, influence silicon architecture decisions, and deliver world-class test solutions across complex multi-billion transistor designs.
What You'll D
oLead DFT architecture, implementation, and signoff for complex SoCs and IPs
.Define and drive chip-level DFT strategy including Scan, ATPG, MBIST, LBIST, Boundary Scan, Compression, and Silicon Bring-up
.Own test coverage, test quality, diagnosis strategy, and manufacturing test readiness
.Drive DFT planning from architecture through tape-out and prod...
Location: Bengaluru
Experience: 12–16 Years
About the Role
We are looking for a highly technical DFT Manager to lead the architecture, implementation, and signoff of Design-for-Test solutions for next-generation SoCs targeting AI/ML, Data Center, Networking, Automotive, and High-Performance Computing applications.
This role requires a hands-on leader who can drive DFT strategy, manage a high-performing engineering team, influence silicon architecture decisions, and deliver world-class test solutions across complex multi-billion transistor designs.
What You'll D
oLead DFT architecture, implementation, and signoff for complex SoCs and IPs
.Define and drive chip-level DFT strategy including Scan, ATPG, MBIST, LBIST, Boundary Scan, Compression, and Silicon Bring-up
.Own test coverage, test quality, diagnosis strategy, and manufacturing test readiness
.Drive DFT planning from architecture through tape-out and prod...